RISC-V RARS Address Space

Default Memory Configuration (Default RV32)

When RARS is left on its default settings, the address space segments are allocated as follows:

Memory
Segment
Base/Start Address End Address Purpose & Behavior
Reserved 0x0000_0000 0x003F_FFFF Reserved for the system;
inaccessible to user programs.
Text Section
(.text)
0x0040_0000 0x0FFF_FFFF Holds compiled machine code
instructions.
Data Section
(.data)
0x1000_0000 /
0x1001_0000
0x1003_FFFF Holds static and global variables.
Heap 0x1004_0000 0x7FFF_FFFF Dynamic memory allocation; grows
upward via system calls.
Stack 0x7FFF_FE00 0x7FFF_FFFF Initialized at the top of memory;
grows downward toward the heap.
MMIO 0xFFFF_0000 0xFFFF_FFFF Memory-Mapped I/O (e.g.,
keyboard and display tools).

Alternative Memory Configurations

RARS allows you to change the underlying architecture and address space layout to match different requirements or operating systems. You can modify this by navigating to
Settings -> Memory Configuration... in the RARS menu.

64-bit Address Space (RV64): When simulating 64-bit RISC-V, the entire memory architecture shifts to handle standard 64-bit pointers, introducing significantly larger gaps between segments and expanding the reachable virtual memory limits.