RISC-V Assembly Language
Hello World
Print String With Loop
Print String Reversed With Loop
Print String Reversed With Recursion
Float to Scientific (found on the web)
My Stack Dump
Float Parts
Print Float/Double
String to Integer
String to Float
Print Fibonacci Sequence

RISC-V .dword Integers

RISC-V Detect Floating-Point Overflow
RISC-V Detect Integer multiplication Overflow
RISC-V Detect Overflow Code

floating-point double test 01
floating-point double test 02
floating-point double test 03
floating-point double test 04
floating-point double compare LT
floating-point double compare LE
test for negative floating point number
test/demo AUIPC
32-bit demo #1
64-bit demo #1

64-bit (integer) POW function

project 009 (no print function)
project 009 (with print function)

RISC-V RARS (R32) Address Space
RISC-V RARS Instructions
RISC-V RARS System Calls

Functionality Stack
RISC-V Align Data/Code
RISC-V User Defined Multiple Stacks
Linux Mint, Install Java, Run RARS
Bits

Extra


I am currently using windows 10, but plan to switch to Linux at some point.

"It has come to the Triarii"

Introduction

The RISC-V instruction set is modular. It has a small mandatory base integer specification and optional standard extensions. There is no single monolithic "complete" list for all use cases. Chips mix a base (like RV32I or RV64I) with extensions for multiplication, atomics, and floating-point.

The core 32-bit or 64-bit base integer instruction set (RV32I/RV64I) containing basic math, loads, stores, and control flow.

Personal Note

People new to programming should be exposed to assembly language programming to get a feel of how computers work.

I created/collected this hodgepodge of material to teach myself something about RISC-V assembly language programming. It could be used as the start of an assembly language programming course after it is cleaned up and reorganized.

Note: Over the years I have programmed a little in 6 or 7 different assembly languages.

Links

RISC-V (Wikipedia)

RISC-V assembly language (Wikipedia)

RISC-V instruction listings (Wikipedia)

You Can Learn RISC-V Assembly in 10 Minutes | Getting Started RISC-V Assembly on Linux Tutorial (YouTube)

RISC-V Assembly Code #1: Course Intro, Registers (YouTube)
RISC-V Assembly Code #2: ALU, Load, Store Instructions (YouTube)
RISC-V Assembly Code #3: Branch, Jump, Call, Return, etc (YouTube)
RISC-V Assembly Code #4: Asm Directives, Pseudo Instructions (YouTube)
RISC-V Assembly Code #5: RV32 v RV64 (YouTube)
RISC-V Assembly Code #6: Multiply, Divide Instructions (YouTube)
RISC-V Assembly Code #7: Example Program (YouTube)
RISC-V Assembly Code #8: Floating Point-IEEE 754 (YouTube)
RISC-V Assembly Code #9: Floating Point Instructions (pt. 1) (YouTube)
RISC-V Assembly Code #10: Floating Point Instructions (pt. 2) (YouTube))

Beginners RISC-V Assembly (YouTube)

This example uses the standard C library write command. It is
more complicated than the RARS simulator. I suggest you come
back to this later when you know more RISC-V assembly Language.
RISC-V Assembly Hello World (Part 1) (YouTube)
RISC-V Assembly Hello World (Part 2) (YouTube)

QEMU - A generic open source machine emulator and virtualizer (I use RARS. See below.)

Resources

RISC-V Assembly Style Guide

RISC-V ISA Reference

RISC-V Assembler Cheat Sheet

RISC-V Assembly Language Reference Card

RISC-V Syscalls
(RISC-V assembly system calls are executed using the ecall instruction (system call). By standard convention, the system call number must be loaded into register a7, and any required arguments are passed through registers a0 to a6.)

RISC-V Assembly Directives

RISC-V Assembly Programmer’s Manual

RISC-V Assembly Programming
(The website contains a set of resources to support learning/teaching assembly programming using the RISC-V ISA.) (Instruction Set Architecture (ISA))

RARS (RISC-V Assembler and Runtime Simulator)

This is the assembler/simulator I am using to learn RISC-V assembly language programming. It is written in Java and should run everywhere Java runs. (Windows, MAC, Linux, ...)

RARS Documentation

1. To execute a Java JAR files on Windows 10, install Java Runtime Environment (JRE) or Java Development Kit (JDK) (requires Java 8+). You can download the latest official version from java.com.

2. Create a <work folder> on the desktop or wherever you want.

3. Download the latest RARS jar file (rars1_6.jar?) to the <work folder>. (I downloaded it from HERE.)

4. Execute RARS

  1. from a shortcut on the desktop (or elsewhere)...

    • create a shortcut on the desktop to the rars.jar file in the <work folder>
    • double click on the rars.jar file shortcut

  2. from the File Explorer...

    • navigate to the <work folder>
    • double click on the rars.jar file

  3. from a command prompt window...

    cd <work folder> java -jars rars.jar

5. RARS .include

The .include directive inserts the contents of another assembly source file directly into your current file during the preprocessing stage.

.include "filename.asm"

6. RARS allow source code (functions, libraries, macros, ...) to be in separate files. This means a program can be made up of multiple files.

7. You can change RARS fonts via menu: Settings > Highlighting.

8. RARS Links

Lab1 Intro to RARS
(RARS) RISC-V Assembler and Runtime System (RARS system calls)
RARS Wiki

Hello World (RISC-V Assembly Language Example)

.data hello: .asciz "Hello World!\n" .text .global main main: li a7, 4 # syscall code (4 is print string) la a0, hello # load address of the string to print into a0 ecall # syscall li a7, 10 # syscall code (10 is exit system call) ecall # syscall

Question: What is the difference between syscall 10 and syscall 93?

The difference Between .s and .asm Files

 .s (or .S).asm
Primary Toolchain GNU Assembler (GAS) / GCC / Clang Keil, MARS, Venus, or Windows-based IDEs
C Preprocessor Supported automatically if using uppercase .S Generally not supported
Compiler Output Default extension when compiling C to assembly (gcc -S) Rarely generated automatically by modern compilers
Portability Standard for Linux, embedded RTOS, and open-source RISC-V Common in academic simulators and legacy microcontrollers
Table from the web.

Some Macros

32-bit architecture assembly language.

# ---- push a register's value onto the stack .macro push(%reg) addi sp,sp,-4 sw %reg,0(sp) .end_macro # ---- pop a value from top-of-stack into a register .macro pop(%reg) lw %reg,0(sp) addi sp,sp,4 .end_macro # ---- push multiple register values onto the stack .macro pushmulti addi sp,sp,-8 sw x1,0(sp) sw x2,4(sp) .end_macro # ---- pop multiple stack values into registers .macro popmulti lw x1,0(sp) lw x2,4(sp) addi sp,sp,8 .end_macro

Notes:

  1. See 1's complement and 2's complement binary numbers to see how integer arithmetic is accomplished.

    Binary Arithmetic!    The Binary System    Binary Numbers (pdf)    Two's Complement

  2. RISC-V assembly language is a modular low-level programming language designed to map directly to the machine instructions of RISC-V processors.

  3. In RISC-V, we have two methods of storing data: main memory and registers. Registers are much faster than using main memory, but are very limited in space. The RISC-V ISA is a load–store architecture. It is an instruction set architecture that divides instructions into two categories: memory access (load and store between memory and registers) and ALU operations (which only occur between registers).

  4. RISC-V specifies little-endian as its standard byte order for memory data and instruction fetch. However, the privileged architecture specification also includes provisions for optional or runtime-configurable big-endian data access.

  5. Typical program's memory layout

    image missing
    Image From: commons.wikimedia.org


  6. Typical computer program's stack frame layout

    image missing

    Note:

    • RISC-V passes the first 8 arguments to a function using the a0 to a7 registers, not the stack.
    • A positive offset from the FP can be used to access data in the stack frame.
    • The SP can be uses as the FP if the dynamic stack is not used by the function, or if the SP is reset back to the bottom of the frame.


  7. RISC-V pseudo-instructions are shorthand commands that the assembler expands into one or more real machine instructions. They make assembly code easier to read and write.

    For RARS (RISC-V Assembler and Runtime Simulator) instructions, built-in documentation and instruction lists are accessible directly inside the application's Help menu, or online through the RARS GitHub Repository. You can also reference the standard RISC-V Greensheet for complete instruction sets.

  8. RISC-V Instruction Size

  9. RISC-V General-Purpose Registers
    RISC-V Integer Registers (compact table)

  10. RISC-V Function/Stack

  11. RISC-V Stack Frame

  12. RISC-V Function Prologue and Epilogue

  13. RISC-V J, JAL, JR, JALR

  14. RISC-V Jump Table

  15. RISC-V Bit Operations

  16. RISC-V My Stack Dump

  17. RISC-V Control and Status Registers

  18. RISC-V Program Structure

  19. RISC-V Assembly Language Templates

  20. RISC-V Floating-Point Numbers

  21. RISC-V Print Float

  22. RISC-V IEEE 754 Floating-Point Standard

  23. RISC-V Decimal Floating-Point

  24. RISC-V Compare Floating-point Numbers

  25. RISC-V Arrays and Lists

  26. RISC-V Heap

  27. RISC-V Sections

  28. RISC-V Read Integer From Console

  29. RISC-V RARS Write To File

  30. RISC-V RARS Read a File (one-buffer-at-time)
    RISC-V RARS Read a File (one-line-at-a-time)

  31. RISC-V RARS MIDI (sound/music)

  32. ASCII (oct,dec,hex)
    ASCII dec
    ASCII hex

  33. Number Converter (bin,oct,dec,hex) (Useful Tool)

Some Projects

Project #1 Project #2 Project #3 Project #4
Project #5 Project #6 Project #7 Project #8
Project #9 Project #10 Project #11 Project #12
Project #13 Project #14    

RISC-V ALE Exercise Book
RISC-V Practice Problems
RISC-V-Assembly-Introductory-Exercises

Some Useful? Definitions

ABIApplication Binary Interface
RISC-V Defines
1. register aliases
2. calling conventions
3. caller-saved and callee-saved registers
4. stack management
5. data types and sizes
6. system calls
7. is the standard low-level contract that allows independently compiled code, libraries,
and the operating system to work together.
ALUarithmetic logic unit
CPUcentral processing unit (it is the "brain" of a computer)
1. fetches instructions from memory
2. decodes commands to determine what action to take
3. runs programs
ISAinstruction set architecture
1. an abstract model that defines the programmable interface of the CPU of a computer
2. defines how software interacts with hardware
3. defines what the physical processor instructions mean.

Simplified CPU Diagram


Image From: commons.wikimedia.org

Miscellaneous

Bonus Question: Who was William 'Wild Bill' Gelbke?